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Semiconductor Industry Electronic Design Automation (EDA) Case Study

Seagate’s Use of ThinLinc for EDA: A Success Story

Sep, 02, 24


 

Seagate, a global leader in data storage solutions, has successfully integrated ThinLinc into its chip design and development operations, specifically to support its Electronic Design Automation (EDA) processes. This team is responsible for developing the advanced chips that play a crucial role in managing Seagate’s hard disk drives (HDDs) and other storage devices.

The Challenge

To maintain a high-performance and efficient development environment, Seagate needed a robust remote access solution that could support their engineers, especially as the shift to remote work became more prevalent. The solution had to ensure seamless access to the complex tools and resources necessary for chip development, including VHDL coding, regression testing, and chip manufacturing.

The Solution: ThinLinc

Seagate adopted ThinLinc as its remote desktop server solution to meet these needs. For over six years, more than 500 engineers at Seagate have utilized ThinLinc to access their CentOS-based development environment. ThinLinc’s reliability and performance have been instrumental in allowing Seagate’s engineers to continue their critical work, no matter where they are located.

Benefits Realized

  1. Enhanced Remote Access: ThinLinc provides a dependable and high-performance remote access solution that supports Seagate’s EDA activities, enabling engineers to maintain productivity, even in a remote work setting.
  2. Seamless Integration: ThinLinc integrates smoothly with Seagate’s existing infrastructure, including their CentOS-based servers, delivering a “bare metal” operating system experience that is well-suited for their high-demand EDA applications.
  3. Flexibility in Usage: ThinLinc supports the entire chip development workflow at Seagate, from VHDL code creation to regression testing, ensuring that all stages of the chip design process are fully supported.
  4. Scalability and Longevity: With over 500 engineers actively using ThinLinc, the solution has proven its scalability and reliability over the years, becoming a cornerstone of Seagate’s EDA operations.

Inside Seagate’s ThinLinc Operations

A standout feature of Seagate’s success with ThinLinc is the efficiency of their support operations. Despite having a global user base of over 500 engineers, Seagate manages ThinLinc with a remarkably small support team:

“We have a worldwide support team of three people to support four to five hundred engineers accessing ThinLinc from various portions of the world.”


This lean support structure is a testament to the stability and reliability of ThinLinc. The platform’s robust performance minimizes the need for extensive troubleshooting, allowing a small team to effectively manage and support a large number of users.

Moreover, when support issues do arise, they are often unrelated to ThinLinc itself. As the Seagate representative notes:

“ThinLinc is really the main focus on how the engineers get their jobs done every day.”

 

This statement highlights the central role ThinLinc plays in enabling Seagate’s engineers to remain productive, regardless of their location. The fact that most of the support team’s efforts are directed towards resolving non-ThinLinc-related issues—such as desktop configuration or connectivity problems—further underscores the platform’s reliability.

In summary, ThinLinc’s stability and efficiency allow Seagate to operate with a minimal support footprint, ensuring that their engineers can consistently access the tools they need to perform at their best.

Explore More: Why ThinLinc is Ideal for EDA Workflows

If you found the Seagate use case insightful, we invite you to dive deeper into how ThinLinc can revolutionize your EDA workflows in semiconductor design. Check out our comprehensive blog post, Five Reasons Why ThinLinc Remote Desktop is a Perfect Fit for EDA Workflows in Semiconductor Design, to learn more about how ThinLinc can enhance productivity, ensure seamless remote access, and support complex chip design processes.